The invention relates to a semiconductor integrated circuit and an electronic control unit and particularly it can be preferably applied to a microcontroller (hereinafter, occasionally referred to as an MCU) that is a semiconductor integrated circuit mounted on an electronic control unit (ECU: Electronic Control Unit) requiring a high reliability.
In the semiconductor integrated circuits such as MCU, the temperature with the normal operation assured is defined by a junction temperature Tj of a semiconductor in many cases. In an electronic control unit for controlling an MCU-mounted vehicle, especially when the electronic control unit is an engine control unit and set in an engine room getting extremely hot, the operation temperature of the mounted MCU is controlled not to deviate from the assured range of the normal operation.
Japanese Unexamined Patent Application Publication No. Hei 11(1999)-249748 discloses a technique of suppressing the operation of MCU depending on the measured temperature Ta in order that a surrounding temperature Ta (atmosphere temperature) within the electronic control unit may be less than the temperature of the upper limit in which the MCU can operate stably, in order to avoid overheating of the MCU including thermal influence from the surrounding. A chip thermistor within the engine control unit is used to measure the temperature Ta, feed back the measurement result to the MCU, to reduce the operation temperature of the MCU itself, by means of software. The MCU uses a Central Processing Unit (CPU) to check the information of the temperature Ta after conversion of a signal input from the chip thermistor in an A/D converter in a way of software, and under the temperature situation where the operation gets unstable, by reducing the oscillation frequency of the system clock of the MCU in a clock control circuit, heat generation of the MCU itself is reduced.
As the result of examination of the above patent publication by the inventor et al., the following problems are found newly.
The related technique including the technique disclosed in the above patent publication is a technique for controlling the operation temperature of a semiconductor integrated circuit such as MCU not to deviate from the assured range of the normal operation, but no consideration is taken to a lifetime due to aged deterioration (wear out failure). When a semiconductor integrated circuit deviates from the assured range of the normal operation, the normal function and property cannot be assured but it does not necessarily come to a failure in an instant. On the other hand, even in the temperature range with the normal operation assured, the cumulative operating time comes to a wear out failure, and out of the above temperature range, even if the operation stops, it is found that the cumulative time of deviating from the temperature range comes to a wear out failure. For example, an MCU mounted on an engine control unit for vehicle can be exposed to a high temperature environment, being set in the engine room as mentioned above. Further, during the battery charge of a hybrid vehicle, the engine stops and the MCU of the engine control unit stops the operation; however, the temperature of the MCU could be in a situation of a high temperature. It is found that the accumulation of this state causes a wear out failure.
As mentioned above, the operation of the semiconductor integrated circuit should be assured to be free from the wear out failure, in addition to the assurance of the normal operation. Here, the assurance of the operation means a function of informing a user that on the assumption that the circuit would naturally come to the wear out failure, it is in a usable period before the wear out failure.
The inventor et al. have examined the application of the temperature monitoring function disclosed in the above patent application to a technique of predicting a lifetime due to the aged deterioration; however, the following problems are found. The temperature monitoring function for assuring the normal operation operates only when the semiconductor integrated circuit is operating and while it stops the operation, it cannot monitor the temperature. Further, although it can monitor the temperature, it cannot do more than judge whether or not the temperature at that time exceeds the assurance range, which is not proper to predict the lifetime.
Means for solving the problems will be described later and other problems and novel characteristics will be apparent from the description and the attached drawings of this specification.
According to one embodiment, a semiconductor integrated circuit is provided as follows.
It includes a processor, a temperature sensor, a non-volatile memory, and a comparator formed on the same semiconductor substrate. The comparator compares a temperature measured by the temperature sensor with a predetermined temperature threshold, and the non-volatile memory accumulatively holds the information about a period with the temperature exceeding the temperature threshold. The semiconductor integrated circuit notifies the outward of a warning when the cumulative value of the period having the temperature exceeding the temperature threshold exceeds a predetermined high temperature time threshold.
According to the above form of the embodiment, the following effect can be obtained.
It is possible to provide a semiconductor integrated circuit (for example, MCU) capable of predicting its own lifetime (wear out failure) due to the aged deterioration and notifying a warning.